SEOUL, South Korea / RankWire.AI / – Samsung Electronics has unveiled its next-generation memory and storage strategy for artificial intelligence infrastructure at the 2026 OCP Global Summit. The company presented the plans at the event in San Jose, California, which runs from October 12 to 15. Samsung outlined three technology directions covering high-performance memory, Compute Express Link-based memory expansion and next-generation solid-state drives. It also plans a joint CXL demonstration with Advanced Micro Devices. The strategy targets memory limits that are slowing larger AI workloads.
Samsung grouped its approach around speed, memory scalability and data persistence. High-performance memory forms the first pillar, with the company showcasing customized high-bandwidth memory and HBM5, its eighth-generation HBM. The second pillar uses CXL to add memory capacity beyond what is installed in each server. The third focuses on data storage and management through next-generation enterprise SSDs and storage software. Samsung says the three areas work together to raise overall AI system performance.
Samsung linked the strategy to rising memory demand from AI agents and inference workloads. Larger models generate more data during inference and require more memory to hold it. Existing server designs often cap the capacity available to each processor. Samsung proposed CXL as a way to move past those limits without redesigning entire systems. The company also highlighted key-value cache optimization, which helps AI models reuse previously processed data instead of computing it again.
Samsung and AMD demonstrate CXL memory expansion
Samsung and AMD are jointly demonstrating a CXL-based memory expansion solution at the summit. The technology allows processors to share memory resources and scale capacity flexibly across AI systems. Samsung says the solution has been validated in real system environments. The two companies signed a memorandum of understanding in March 2026 covering next-generation AI memory and computing technologies. AMD Chief Executive Lisa Su also visited South Korea on October 7 to discuss memory and foundry cooperation.
Samsung also demonstrated CMM-D, its CXL-based DRAM memory module, in a memory pooling configuration. The setup links multiple CXL memory units into a shared pool that different systems can draw from as needed. Other displays included processing-in-memory technology, which performs some calculations inside memory chips to cut data transfers. Samsung showed 2-nanometer gate-all-around wafers and Groq LPU wafers. Nvidia’s Groq 3 LPX system also appeared among the company’s exhibits.
Partners gain earlier access to memory validation
Shim Ho-jun, Corporate Vice President and Head of Samsung’s Application Engineering Team, presented the strategy during an executive session. He said expanding memory capacity and bandwidth is becoming more important as AI models grow larger and inference demand rises. Shim added that Samsung is expanding co-design and technical validation with global partners from the early stages of development. The approach aims to align memory products with customer system requirements before commercial deployment.
Samsung MAX Lab supports that effort by letting customers test memory and storage under real AI workloads. Customers can validate technologies such as PIM and next-generation SSDs before commercialization. Samsung attended the summit as a Diamond Sponsor of the Open Compute Project event. The appearance follows Samsung‘s presentations at Nvidia GTC in March, COMPUTEX in June and the Future of Memory and Storage conference in August. The company continues to position memory capacity as central to AI infrastructure performance.
